1. Field of the Invention
This invention relates to operational amplifiers (op amps), and more particularly to a gain enhancement that is particularly useful for low voltage, single supply op amps.
2. Description of the Related Art
Amplifiers are being designed to work with lower and lower supply voltages. Whereas in the past positive and negative 15 volt supplies ("rails") were typical, amplifiers are presently being designed to work with +5 volt and ground rails, and even +3 volt and ground rails. A primary reason for the steady reduction in power supply levels is the need for lower power dissipation in battery powered electronic devices, such as laptop computers and cellular telephones.
An improved operational amplifier circuit is described in U.S. Pat. No. 4,687,984 by the present inventor, "JFET Active Load Input Stage", which provides improvements in both common mode rejection ratio (CMRR) and common mode voltage range (CMVR), and also is less likely to go into saturation or cut-off states during high slew rates. The circuit is known as a "folded cascode" operational amplifier, and has been used successfully in numerous applications. However, it has a limited transconductance (defined as the change in output current for a given change in input voltage), which limits the amplifier's gain and thereby makes it less useful for low voltage, single supply applications than it might otherwise be.